svm: Handle MC4_MISC threshold register for guests

svm: Handle MC4_MISC threshold register for guests

The threshold register has been introduced in AMD RevF CPUs along with
SVM (Actually this MCA/MCE msr register existed before, but had no
meaning). Therefore no need for additional cpuid checks.

On read access it reports the HVM guest the register has been locked
by the BIOS. This means, it is not available for OS use. Thus, write
accesses are simply ignored. This behaviour actually matches real HW,
so guests can deal with this.

Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>